A High-Speed Well Logging Telemetry System Based on Low-Power FPGA

This paper presents a field-programmable gate array (FPGA)-based design, implementation, and measurement of high-speed telemetry system for well-logging. In the application geophysics, is an essential part. With continuous development new logging theory methods, must accurately upload more information in real-time. The methods techniques used to improve data transmission system’s performance have become significant problem developing well-logging instrument. proposed design realized orthogonal frequency division multiplexing (OFDM) cable system. Besides, We optimized calculation some modules such as symbol synchronization, domain equalization, compression, sampling clock offset compensation while not losing much possible so that modulation demodulation algorithm can be implemented on low-power FPGA. this system, modulated transmitted over 7,000-meter armored demodulated Compared conventional devices using digital signal processors, FPGA-based shows advantages power consumption real-time performance. Test results show FPGA 169.7mW, transmit stably at 1.4 2.3Mbps through cable.